论文标题

硬件安全性高级方法:教程

High-Level Approaches to Hardware Security: A Tutorial

论文作者

Pearce, Hammond, Karri, Ramesh, Tan, Benjamin

论文摘要

设计师使用第三方知识产权(IP)核心,并在集成电路(IC)设计和制造流中外包。结果,安全漏洞一直在增加。这迫使IC设计师和最终用户重新评估他们对IC的信任。如果攻击者掌握了未受保护的IC,他们可以对IC进行反向工程并盗版IP。同样,如果攻击者掌握了设计,他们可以在设计中插入恶意电路或利用“后门”。意外的设计错误也可能导致安全弱点。 本教程论文通过两个教学示例的硬件安全问题介绍了硬件安全性领域。首先是基于扫描链的侧渠道攻击的演艺。第二个是数字设计逻辑锁定的演练。教程材料附有链接的开放访问数字资源。

Designers use third-party intellectual property (IP) cores and outsource various steps in the integrated circuit (IC) design and manufacturing flow. As a result, security vulnerabilities have been rising. This is forcing IC designers and end users to re-evaluate their trust in ICs. If attackers get hold of an unprotected IC, they can reverse engineer the IC and pirate the IP. Similarly, if attackers get hold of a design, they can insert malicious circuits or take advantage of "backdoors" in a design. Unintended design bugs can also result in security weaknesses. This tutorial paper provides an introduction to the domain of hardware security through two pedagogical examples of hardware security problems. The first is a walk-through of the scan chain-based side channel attack. The second is a walk-through of logic locking of digital designs. The tutorial material is accompanied by open access digital resources that are linked in this article.

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