论文标题
使用机器学习在工作负载依赖下建模和预测晶体管老化
Modeling and Predicting Transistor Aging under Workload Dependency using Machine Learning
论文作者
论文摘要
可靠性的关键问题是电路设计师的巨大关注点之一。驱动力是晶体管老化,取决于操作电压和工作量。在设计时,很难估算近距到边缘的护罩,以保持寿命在海湾的衰老效果。这是因为铸造厂不共享其基于物理的校准模型,该模型包括高度机密的技术和材料参数。但是,不受监控但必要的降解量相当于绩效下降,这是可以预防的。此外,这些基于物理学的模型在计算上非常复杂。在设计时,建模数百万个单个晶体管的成本显然是过高的。我们提出了训练有素的机器学习模型的革命前景,以复制基于物理的模型,以免披露机密参数。出于设计优化的目的,电路设计人员可以完全访问这种有效的解决方法。我们证明了模型通过对一个电路的数据进行训练并将其应用于基准电路的能力。平均相对误差高达1.7%,速度高达20倍。电路设计师有史以来第一次可以轻松访问高精度老化模型,这对于有效的设计至关重要。这项工作是朝着铸造厂和电路设计师之间桥接宽阔的湾方向迈出的一个有希望的步骤。
The pivotal issue of reliability is one of colossal concern for circuit designers. The driving force is transistor aging, dependent on operating voltage and workload. At the design time, it is difficult to estimate close-to-the-edge guardbands that keep aging effects during the lifetime at bay. This is because the foundry does not share its calibrated physics-based models, comprised of highly confidential technology and material parameters. However, the unmonitored yet necessary overestimation of degradation amounts to a performance decline, which could be preventable. Furthermore, these physics-based models are exceptionally computationally complex. The costs of modeling millions of individual transistors at design time can be evidently exorbitant. We propose the revolutionizing prospect of a machine learning model trained to replicate the physics-based model, such that no confidential parameters are disclosed. This effectual workaround is fully accessible to circuit designers for the purposes of design optimization. We demonstrate the models' ability to generalize by training on data from one circuit and applying it successfully to a benchmark circuit. The mean relative error is as low as 1.7%, with a speedup of up to 20X. Circuit designers, for the first time ever, will have ease of access to a high-precision aging model, which is paramount for efficient designs. This work is a promising step in the direction of bridging the wide gulf between the foundry and circuit designers.