论文标题
利用平均水平：预硅侧通道泄漏评估中的平均采样
Leverage the Average: Averaged Sampling in Pre-Silicon Side-Channel Leakage Assessment
论文作者
论文摘要
Silicon前侧通道泄漏评估是在设计时确定硬件漏洞的有用工具，但是它需要许多高分辨率的功率轨迹，并增加了设计的功率模拟成本。通过下采样并平均这些高分辨率痕迹，我们表明，可以大大降低功率模拟成本，而不会大幅损失侧向通道泄漏评估质量。我们为我们的主张介绍了理论基础。我们的结果表明，对RISC-V SOC的栅极级侧渠道泄漏评估，最多可提高功率模拟速度。此外，我们阐明了可以成功使用平均采样技术的条件。
Pre-silicon side-channel leakage assessment is a useful tool to identify hardware vulnerabilities at design time, but it requires many high-resolution power traces and increases the power simulation cost of the design. By downsampling and averaging these high-resolution traces, we show that the power simulation cost can be considerably reduced without significant loss of side-channel leakage assessment quality. We introduce a theoretical basis for our claims. Our results demonstrate up to 6.5-fold power-simulation speed improvement on a gate-level side-channel leakage assessment of a RISC-V SoC. Furthermore, we clarify the conditions under which the averaged sampling technique can be successfully used.
