论文标题

GenGNN:图形神经网络加速的通用FPGA框架

GenGNN: A Generic FPGA Framework for Graph Neural Network Acceleration

论文作者

Abi-Karam, Stefan, He, Yuqi, Sarkar, Rishov, Sathidevi, Lakshmi, Qiao, Zihang, Hao, Cong

论文摘要

图形神经网络(GNN)由于对无处不在的图形相关问题(例如量子化学,药物发现和高能量物理学)的广泛适用性,最近在受欢迎程度上爆炸了。但是,由于难以开发有效的FPGA加速器的困难与创建新的GNN模型的快速速度之间的差距,因此满足对新型GNN模型和快速推理的需求是具有挑战性的。先前的艺术专注于特定类别的GNN类别的加速,但缺乏在现有模型中工作或扩展到新的和新兴的GNN模型的普遍性。在这项工作中,我们建议使用名为Gengnn的高级合成(HLS)的通用GNN加速框架,其目标是两个目标。首先,我们旨在提供超快速的GNN推理,而无需预处理实时要求的任何图表。其次,我们旨在支持一组各种GNN模型,以灵活适应新模型。该框架具有适用于所有型号的优化消息通信结构,并结合了丰富的模型特定组件库。我们在Xilinx Alveo U50 FPGA上验证我们在板上的实施,并观察到对CPU(6226R)基线的加速高达25倍,而对GPU(A6000)基线的速度最高为13倍。我们的HLS代码将在接受后在Github上开源。

Graph neural networks (GNNs) have recently exploded in popularity thanks to their broad applicability to ubiquitous graph-related problems such as quantum chemistry, drug discovery, and high energy physics. However, meeting demand for novel GNN models and fast inference simultaneously is challenging because of the gap between the difficulty in developing efficient FPGA accelerators and the rapid pace of creation of new GNN models. Prior art focuses on the acceleration of specific classes of GNNs but lacks the generality to work across existing models or to extend to new and emerging GNN models. In this work, we propose a generic GNN acceleration framework using High-Level Synthesis (HLS), named GenGNN, with two-fold goals. First, we aim to deliver ultra-fast GNN inference without any graph pre-processing for real-time requirements. Second, we aim to support a diverse set of GNN models with the extensibility to flexibly adapt to new models. The framework features an optimized message-passing structure applicable to all models, combined with a rich library of model-specific components. We verify our implementation on-board on the Xilinx Alveo U50 FPGA and observe a speed-up of up to 25x against CPU (6226R) baseline and 13x against GPU (A6000) baseline. Our HLS code will be open-source on GitHub upon acceptance.

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