论文标题

可配置的独立组件分析预处理加速器

Configurable Independent Component Analysis Preprocessing Accelerator

论文作者

Lu, Hsi-Hung, Shen, Chung-An, Fouda, Mohammed E., Eltawil, Ahmed M.

论文摘要

独立组件分析(ICA)已在许多应用中使用,包括用于频段内全载无线系统的自我干预取消和工业互联网中的异常检测。本文为ICA算法提供了高通量和高效的可配置预处理加速器。提出的ICA加速器具有三个主要块,可以执行数据中心,协方差矩阵进行计算和特征值分解(EVD)。具体而言,提出的加速器基于高性能矩阵乘法阵列(MMA)。提出的MMA体系结构使用时间多工处理,从而大大提高了硬件利用率的效率。此外,处理流程利用并行处理,从而同时进行中心,协方差矩阵和EVD的计算,并单独进行管道以最大化吞吐量。本文根据建议的预处理ICA加速器的层次提取,介绍了建筑,电路设计和性能估算。所提出的设计以73.3 kge的复杂性达到每秒40.7 kmatrices的吞吐量。

Independent component analysis (ICA) has been used in many applications, including self-interference cancellation for in-band full-duplex wireless systems and anomaly detection in industrial internet of things. This paper presents a high-throughput and highly efficient configurable preprocessing accelerator for the ICA algorithm. The proposed ICA accelerator has three major blocks that perform data centering, covariance matrix for computation, and eigenvalue decomposition (EVD). Specifically, the proposed accelerator is based on a high-performance matrix multiplication array (MMA). The proposed MMA architecture uses time-multiplexed processing so that the efficiency of hardware utilization is greatly enhanced. Furthermore, the processing flow utilizes parallel processing such that the centering, the calculation of the covariance matrix, and EVD are conducted simultaneously and are individually pipelined to maximize throughput. This paper presents the architecture, circuit design, and performance estimates based on post-layout extraction of the proposed preprocessing ICA accelerator. The proposed design achieves a throughput of 40.7 kMatrices per second at complexity of 73.3 kGE.

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