论文标题
HLS和HDL在SOC上的比较研究用于图像处理应用
A Comparative Study between HLS and HDL on SoC for Image Processing Applications
论文作者
论文摘要
当今系统和有限的市场时间的复杂性日益增加，需要FPGA的新开发工具。目前，除了传统的硬件说明语言（HDLS）外，还有高级合成（HLS）工具可以增加系统开发中的抽象水平。尽管设计和测试的简单性更为简单，但HLS在描述荷威方面仍存在一些缺点。本文使用SOBEL过滤器作为图像处理场中的案例研究，介绍了HLS和HDL之间的比较研究。结果表明，考虑到资源使用和响应时间的HLS版本，HDL实现略好。但是，HDL解决方案所需的编程工作明显大于HLS对应物中所需的编程工作。
The increasing complexity in today's systems and the limited market times demand new development tools for FPGA. Currently, in addition to traditional hardware description languages (HDLs), there are high-level synthesis (HLS) tools that increase the abstraction level in system development. Despite the greater simplicity of design and testing, HLS has some drawbacks in describing harware. This paper presents a comparative study between HLS and HDL for FPGA, using a Sobel filter as a case study in the image processing field. The results show that the HDL implementation is slightly better than the HLS version considering resource usage and response time. However, the programming effort required in the HDL solution is significantly larger than in the HLS counterpart.
