论文标题
解决内存浮点计算的弹性
Addressing Resiliency of In-Memory Floating Point Computation
论文作者
论文摘要
内存计算（IMC）可以消除处理器和内存之间的数据运动，这是von-Neumann计算中能效和性能的障碍。电阻RAM（RRAM）是IMC应用程序（例如整数和浮点（FP）操作和随机逻辑实现）的有前途的设备之一，这是由于跨杆体系结构中的低功耗，快速操作和较小的足迹。在本文中，我们提出了使用基于RRAM横杆的IMC的管道FP算术（加法/减法器）的名声。提出了一种新型的移位电路，以降低FP操作期间的换档开销。由于我们建筑中使用的RRAM中有96％处于高电阻状态（HRS），因此我们提出了两种方法，即以换档（SATO）（SATO）和强制向VDD（FTV）（地面（FTG））减轻stuck-at-1（SA）（SA（SA1））故障。在这两种技术中，都利用无故障RRAM来使用额外的时钟周期来执行计算。尽管性能降低了50％，但SATO可以处理50％的故障，而FTV可以处理基于RRAM的计算阵列中99％的故障，低功率和面积的头顶。仿真结果表明，提出的单个精度FP加法器分别用于基于NAND和NON-NOR的实现，分别消耗了335 PJ和322 PJ。 Sato和FTV的开销区域分别为28.5％和9.5％。
In-memory computing (IMC) can eliminate the data movement between processor and memory which is a barrier to the energy-efficiency and performance in Von-Neumann computing. Resistive RAM (RRAM) is one of the promising devices for IMC applications (e.g. integer and Floating Point (FP) operations and random logic implementation) due to low power consumption, fast operation, and small footprint in crossbar architecture. In this paper, we propose FAME, a pipelined FP arithmetic (adder/subtractor) using RRAM crossbar based IMC. A novel shift circuitry is proposed to lower the shift overhead during FP operations. Since 96% of the RRAMs used in our architecture are in High Resistance State (HRS), we propose two approaches namely Shift-At-The-Output (SATO) and Force To VDD (FTV) (ground (FTG)) to mitigate Stuck-at-1 (SA1) failures. In both techniques, the fault-free RRAMs are exploited to perform the computation by using an extra clock cycle. Although performance degrades by 50%, SATO can handle 50% of the faults whereas FTV can handle 99% of the faults in the RRAM-based compute array at low power and area overhead. Simulation results show that the proposed single precision FP adder consumes 335 pJ and 322 pJ for NAND-NAND and NOR-NOR based implementations, respectively. The area overheads of SATO and FTV are 28.5% and 9.5%, respectively.
