论文标题
确保：RTL锁定不受信任的铸造厂
ASSURE: RTL Locking Against an Untrusted Foundry
论文作者
论文摘要
半导体设计公司正在集成专有的知识产权（IP）块，以构建自定义集成电路（IC），并在第三方铸造厂制造它们。未经授权的IC副本每年花费这些公司数十亿美元。尽管已经提出了几种用于硬件IP混淆的方法，但它们在Gate级的NetList上运行，即合成工具将语义信息嵌入到网络列表中之后。我们建议保证在寄存器转移级别（RTL）描述上保护硬件IP模块。 RTL方法具有三个优点：（i）允许设计人员使用许多不同方法（例如，硬件生成器，高级合成工具和预先存在的IPS）混淆IP内核。 （ii）在逻辑合成之前，它混淆了IC的语义； （iii）它不需要对EDA流进行修改。我们对Assure进行成本和安全评估。
Semiconductor design companies are integrating proprietary intellectual property (IP) blocks to build custom integrated circuits (IC) and fabricate them in a third-party foundry. Unauthorized IC copies cost these companies billions of dollars annually. While several methods have been proposed for hardware IP obfuscation, they operate on the gate-level netlist, i.e., after the synthesis tools embed the semantic information into the netlist. We propose ASSURE to protect hardware IP modules operating on the register-transfer level (RTL) description. The RTL approach has three advantages: (i) it allows designers to obfuscate IP cores generated with many different methods (e.g., hardware generators, high-level synthesis tools, and pre-existing IPs). (ii) it obfuscates the semantics of an IC before logic synthesis; (iii) it does not require modifications to EDA flows. We perform a cost and security assessment of ASSURE.
