论文标题
通过和或路径重组对组合逻辑的延迟优化
Delay Optimization of Combinational Logic by And-Or Path Restructuring
论文作者
论文摘要
我们提出了一种动态编程算法，该算法构建了具有规定的输入到达时间的交替和或路径的延迟优化电路。我们的算法通过探索较大的解决方案空间来实现最著名的近似保证，并在经验方面优于早期方法。我们的算法是一个新的时序优化框架的核心，该框架通过逻辑上等效的实现替代任意长度的关键路径而延迟较小。我们的框架允许在工业物理设计流的后期进行对网表逻辑结构的早期决策。实验证明了我们工具对7NM现实世界实例的有效性。
We propose a dynamic programming algorithm that constructs delay-optimized circuits for alternating And-Or paths with prescribed input arrival times. Our algorithm fulfills best-known approximation guarantees and empirically outperforms earlier methods by exploring a significantly larger portion of the solution space. Our algorithm is the core of a new timing optimization framework that replaces critical paths of arbitrary length by logically equivalent realizations with less delay. Our framework allows revising early decisions on the logical structure of the netlist in a late step of an industrial physical design flow. Experiments demonstrate the effectiveness of our tool on 7nm real-world instances.
