论文标题
WAVE UNION方法是否仍然适用于20 nm基于FPGA的高分辨率（<2 PS）数字转换器？
Are wave union methods still suitable for 20 nm FPGA-based high-resolution (< 2 ps) time-to-digital converters?
论文作者
论文摘要
本文介绍了几个新结构，以追求Xilinx 20 nm Ultrascale田间可编程栅极阵列（FPGAS）的高分辨率（<2 PS）数字转换器（TDC）。提出的TDC结合了1）我们新提出的亚敲击延迟线（sub-tdl）结构有效地消除气泡和零键，以及2）波浪联合（WU）一种方法来改善分辨率并减少从超速箱引入的影响。我们还将提出的WU/sub-TDL TDC与TDC结合了双重采样（DS）结构和子TDL技术。此外，我们引入了一种改善线性性的binning方法，并得出了单级TDL-TDC的总测量不确定性的公式，以获得其根平方（RMS）分辨率。结果得出的结论是，所提出的设计在逻辑资源中具有成本效益，并且具有多通道实施的潜力。与以前的研究的结论不同，我们发现与我们的子-TDL结构结合时，波浪结合在Ultrascale设备中仍然具有影响力。我们还与其他已发表的TDC进行了比较，以证明拟议的TDC的位置。
This paper presents several new structures to pursue high-resolution (< 2 ps) time-to-digital converters (TDCs) in Xilinx 20 nm UltraScale field-programmable gate arrays (FPGAs). The proposed TDCs combined the advantages of 1) our newly proposed sub-tapped delay line (sub-TDL) architecture effective in removing bubbles and zero-bins and 2) the wave union (WU) A method to improve the resolution and reduce the impact introduced from ultrawide bins. We also compared the proposed WU/sub-TDL TDC with the TDC combining the dual sampling (DS) structure and the sub-TDL technique. Moreover, we introduced a binning method to improve the linearity and derived a formula of the total measurement uncertainty for a single-stage TDL-TDC to obtain its root-mean-square (RMS) resolution. Results conclude that the proposed designs are cost-effective in logic resources and have the potential for multiple-channel implementations. Different from the conclusions from a previous study, we found that the wave union is still influential in UltraScale devices when combining with our sub-TDL structure. We also compared with other published TDCs to demonstrate where the proposed TDCs stand.
