论文标题
重新访问Rowhammer：现代DRAM设备和缓解技术的实验分析
Revisiting RowHammer: An Experimental Analysis of Modern DRAM Devices and Mitigation Techniques
论文作者
论文摘要
为了更多地阐明Rowhammer如何影响电路级别的现代和未来设备，我们首先介绍了1580 DRAM芯片上Rowhammer的实验表征（408x DDR3，652X DDR4和520x LPDDR4和520x LPDDR4和520x LPDDR4），从300个DRAM模块（60x DDR3，110X DDR3，110X DDR4 ddr4 ddr4 spranserry spranserry）来自三个主要的DRAM制造商中的每个人的不同技术节点。我们的研究明确地表明，较新的DRAM芯片更容易受到Rowhammer的影响：随着设备功能的大小减小，诱导Rowhammer位翻转所需的激活次数也减少了至9.6k（4.8k至两行），在我们测试的最脆弱的芯片中。 我们在从芯片中获取的真实数据的背景下，使用循环精确的模拟来评估五种最先进的Rowhammer缓解机制，以研究缓解机制如何使用芯片脆弱性扩展。我们发现，鉴于我们观察到的Rowhammer脆弱性趋势，现有机制在预计的未来设备中无法扩展或遭受较大的性能开销。因此，研究对Rowhammer的更有效的解决方案至关重要。
In order to shed more light on how RowHammer affects modern and future devices at the circuit-level, we first present an experimental characterization of RowHammer on 1580 DRAM chips (408x DDR3, 652x DDR4, and 520x LPDDR4) from 300 DRAM modules (60x DDR3, 110x DDR4, and 130x LPDDR4) with RowHammer protection mechanisms disabled, spanning multiple different technology nodes from across each of the three major DRAM manufacturers. Our studies definitively show that newer DRAM chips are more vulnerable to RowHammer: as device feature size reduces, the number of activations needed to induce a RowHammer bit flip also reduces, to as few as 9.6k (4.8k to two rows each) in the most vulnerable chip we tested. We evaluate five state-of-the-art RowHammer mitigation mechanisms using cycle-accurate simulation in the context of real data taken from our chips to study how the mitigation mechanisms scale with chip vulnerability. We find that existing mechanisms either are not scalable or suffer from prohibitively large performance overheads in projected future devices given our observed trends of RowHammer vulnerability. Thus, it is critical to research more effective solutions to RowHammer.
