论文标题
以数字驱动系统中模拟动力学的快速FPGA仿真
Fast FPGA emulation of analog dynamics in digitally-driven systems
论文作者
论文摘要
在本文中，我们提出了一种用于FPGA仿真的混合信号系统的体系结构，该系统在高吞吐量下具有很高的精度。我们表示块的模拟输出是对其模拟输入变化的步骤响应的叠加，并且仅在数字子系统需要时评估输出。因此，我们的体系结构旨在用于数字驱动的系统；也就是说，仅在数字时钟边缘上只能在模拟动态块的输入变化的那些。我们使用Xilinx FPGA上建议的体系结构实现了高速链接收发器设计。该设计表明了我们的方法如何打破了先前方法的特征的模拟速率和时间分辨率之间的联系。模拟器具有灵活性，可以实时调整模拟动力学，时钟抖动和各种设计参数。我们证明，与可比的高性能CPU模拟相比，我们的体系结构在运行3个数量级时达到1％的精度。
In this paper, we propose an architecture for FPGA emulation of mixed-signal systems that achieves high accuracy at a high throughput. We represent the analog output of a block as a superposition of step responses to changes in its analog input, and the output is evaluated only when needed by the digital subsystem. Our architecture is therefore intended for digitally-driven systems; that is, those in which the inputs of analog dynamical blocks change only on digital clock edges. We implemented a high-speed link transceiver design using the proposed architecture on a Xilinx FPGA. This design demonstrates how our approach breaks the link between simulation rate and time resolution that is characteristic of prior approaches. The emulator is flexible, allowing for the real-time adjustment of analog dynamics, clock jitter, and various design parameters. We demonstrate that our architecture achieves 1% accuracy while running 3 orders of magnitude faster than a comparable high-performance CPU simulation.
